The present invention generally relates to a method for depositing an inter-metal-dielectric (IMD) layer on a semiconductor substrate and more particularly, relates to a method for depositing a silicon oxide dielectric layer on a silicon wafer by plasma enhanced chemical vapor deposition incorporating a heat-treating step for outgassing prior to the deposition process.
In the processing of semiconductor wafers into IC devices, a multiplicity of fabrication steps, i.e., as many as several hundred, are usually required to complete the fabrication of an IC circuit. For instance, various steps of deposition, cleaning, ion implantation, etching and passivation must be completed before an IC chip can be tested and packaged for shipment.
One of the most frequently required processes in the fabrication of IC circuits is the oxide deposition process. Silicon dioxide films can be deposited by a chemical vapor deposition (CVD) method at a reaction temperature as low as 400xc2x0 C. without consuming silicon in the substrate. The deposition temperature can be further reduced by a plasma-enhanced CVD method. The deposition and the sometimes necessary annealing conditions depend on the application of the oxide layer. When the oxide layer is used as an insulator between conductive layers, the oxide film can be deposited undoped and then densified at elevated temperatures. A common method for depositing silicon dioxide films is the oxidation of silane with oxygen at low pressure and low temperature (such as 400xcx9c450xc2x0 C.). The reaction of silane with nitrous oxide (NO2) can also be used to produce stoichiometric silicon dioxide or silicon-rich oxide by varying the NO2/SiH4 ratio.
In the SiO2 fabrication process, it is desirable to use the plasma-enhanced CVD method such that the substrate can be kept at a low temperature, for instance, at a temperature of 300xc2x0 C. or lower. This is achieved by reacting gases in a glow discharge to produce a plasma which then supplies much of the energy needed for the reaction. A plasma can generally be created by applying a high electric field at a frequency of typically 13.5 MHZ in the gas mixture. A plasma thus produced contains high energy electrons, gas molecules, fragments of gas molecules and free radicals. A plasma-enhanced CVD oxide film can be formed by the reaction of silane at a reaction temperature of approximately 350xc2x0 C. with N2O in a glow discharge. The oxide film produced by a silane and nitrous oxide gas mixture tends to have better uniformity than the oxide film formed by an oxygen reactant gas. In a typical silane/nitrous oxide reaction, silicon dioxide, nitrogen and hydrogen are produced as the end products.
Prior to the deposition of an oxide film on a wafer surface, it is desirable that the wafer surface be cleaned or treated by a physical or chemical method. For instance, a recently developed technique of plasma assisted cleaning which utilizes plasma energy to create reactive species for cleaning or treatment of a wafer surface. In the plasma cleaning process, the wafer is normally placed remote from the plasma in order to avoid radiation damage to the wafer itself. The chemically reactive species are then removed from the plasma region and supplied to the wafer in the form of an afterglow gas. This type of remote plasma technique, for instance, has been used to create chemical reactions in the gas phase for the removal of organic materials from the surface of a wafer with oxygen, i.e., by a nitrous oxide plasma. A plasma assisted chemical cleaning (or etching) is used when isotropic etching is required or when dimensional control is not critical. One of the common plasma assisted chemical etching methods is the removal of photoresist by an oxygen plasma, sometimes referred to as a plasma ashing process wherein oxygen atoms or ions react with organic materials to form volatile products such as CO, CO2 and H2O. A barrel reactor can be used for the plasma ashing process.
In a conventional process of oxide deposition by the PECVD method, a N2O plasma treatment is first performed on the wafer surface to remove all contaminants and impurities. The conventional treatment process can be carried out by first providing a stable vacuum in the process chamber and then by the plasma treatment step. The process chamber is then stabilized with stable reactants before the start of a deposition process.
The oxygen plasma treatment process when followed by a PECVD oxide deposition process, creates other processing problems. For instance, when an oxide deposition process proceeds immediately after the N2O plasma treatment process, residual gases left in the reaction chamber such as moisture, N2O, O2, oxygen ions and photoresist residue can cause problems in the deposition process. The residual gases can be absorbed by the silicon wafer, i.e., at least by a surface layer of the wafer and then driven out of the wafer during a subsequent plasma deposition process conducted at a high deposition temperature such as at about 400xc2x0 C. The impurity gases, particularly the moisture or water vapor that is absorbed in the silicon surface, cause the most problem since some of the moisture does not have time to escape from the silicon surface and is thus covered by the deposited oxide film leading to void problems. The void problem, or sometimes known as xe2x80x9cthe bubbling problem,xe2x80x9d is more severe at the wafer edge where it is more likely for silicon to absorb moisture and to cause cracking in the oxide layer that is subsequently deposited. The cracking or peeling of the oxide layer in turn causes severe quality problems in the subsequently deposited and formed metal interconnect lines, i.e., possible shorting in the metal interconnect lines. The outgassing of the impurity gases, including that of water vapor, during the silicon oxide plasma deposition process must therefore be minimized or eliminated altogether to ensure reliability of the device fabricated and the yield of the fabrication process.
It is therefore an object of the present invention to provide a method for depositing an inter-metal-dielectric layer on a semiconductor wafer that does not have the shortcomings or drawbacks of the conventional deposition process for the IMD layers.
It is another object of the present invention to provide a method for depositing an IMD layer on a semiconductor wafer that does not have cracking or peeling problems of the IMD layer deposited.
It is a further object of the present invention to provide a method for depositing an IMD layer on a semiconductor wafer by incorporating a heat-treating step into the deposition process.
It is another further object of the present invention to provide a method for depositing an IMD layer of silicon oxide on a semiconductor wafer by first conducting an outgassing process during heat treatment to drive out impurity gases absorbed in the wafer surface prior to the deposition process.
It is still another object of the present invention to provide a method for depositing a silicon oxide IMD layer on a semiconductor wafer by heat-treating the wafer at a temperature of at least 300xc2x0 C. for a length of time sufficient to outgas the wafer surface prior to the deposition process.
It is yet another object of the present invention to provide a method for depositing a silicon oxide IMD layer on a semiconductor wafer by a plasma CVD technique wherein the wafer is first heat-treated at a temperature of at least 350xc2x0 C. for at least 1 min. to evaporate impurity gases from the wafer surface prior to deposition.
It is still another further object of the present invention to provide a method for depositing an oxide layer on a silicon wafer incorporating the step of heat-treating the silicon wafer at a temperature of at least 350xc2x0 C. for a length of time sufficient to outgas the wafer and then depositing a silicon oxide layer on the wafer by a plasma enhanced chemical vapor deposition technique.
In accordance with the present invention, a method for depositing a silicon oxide inter-metal-dielectric layer on a semiconductor wafer incorporating a heat treatment step for outgassing the wafer surface prior to the deposition process is provided.
In a preferred embodiment, a method for depositing an inter-metal-dielectric layer on a semiconductor substrate by plasma chemical vapor deposition can be carried out by the operating steps of first providing a pre-processed semiconductor substrate; positioning the semiconductor substrate in a plasma CVD chamber; heating the semiconductor substrate in the chamber to a temperature of at least 300xc2x0 C. for a length of time sufficient to outgas a surface of the semiconductor substrate; and conducting a plasma CVD process on the semiconductor substrate and depositing the inter-metal-dielectric layer.
In the method for depositing an inter-metal-dielectric layer on a semiconductor substrate, the semiconductor substrate is preferably heated to a temperature of at least 350xc2x0 C. during the heating step. The semiconductor substrate may be heated to a temperature of at least 300xc2x0 C. for a time period of at least 30 sec., or preferably to a temperature of at least 350xc2x0 C. for a time period of at least 1 min. The method prevents the deposited inter-metal-dielectric layer from cracking due to outgassing from the semiconductor substrate. The inter-metal-dielectric layer deposited may be silicon oxide. The method may further include the step of flowing a precursor gas of silane into the plasma CVD chamber for depositing said IMD layer, or the step of flowing precursor gases of silane and nitrous oxide into the plasma CVD chamber for depositing the IMD layer. The semiconductor substrate may be heated to a temperature of 400xc2x0 C. for 1 min. during the heating step. The heating step and the depositing step are conducted in the same plasma CVD chamber.
The present invention is further directed to a method for depositing an oxide layer on a semiconductor wafer which can be carried out by the operating steps of first positioning a pre-processed semiconductor wafer in a plasma process chamber; heat-treating the semiconductor wafer at a temperature of at least 350xc2x0 C. for a length of time sufficient to outgas the wafer; and depositing a silicon oxide layer on the wafer by a plasma enhanced chemical vapor deposition technique.
The method for depositing an oxide layer on a semiconductor wafer may further include the step of positioning a pre-processed silicon wafer in the plasma process chamber. The method may further include the step of heat-treating the semiconductor wafer at a temperature of at least 350xc2x0 C. for a time period of at least 30 sec., or the step of heat-treating the semiconductor wafer at 400xc2x0 C. for 1 min. The method may further include the step of evacuating the plasma process chamber prior to the deposition step to a pressure of not higher than 10xe2x88x922 Torr, or the step of cleaning a surface of the semiconductor wafer by a nitrous oxide (N2O) plasma. The method may further include the step of flowing a precursor gas of silane into the plasma process chamber to carry out the deposition process, or the step of flowing precursor gases of silane and nitrous oxide into the plasma process chamber to carry out the deposition process. The method may further include the step of depositing the silicon oxide layer as an inter-metal-dielectric layer, or the step of outgassing moisture from the semiconductor wafer during the heat-treating step.